Categories:
Supported Devices:
-
Altera DE1-SoC
- SystemVerilog
Simulation: Breadboard (Butterfly)
By: RHLab (University of Washington) , Matt Guo (RHLab, University of Washington)
Description
Connect logic gates in a breadboard
Documents
Laboratory Exercises
| Laboratory Exercises | Devices | Authors |
|---|---|---|
| FPGA + Breadboard (Basic Level) |
|
RHLab (University of Washington), Zhiyun Zhang (RHLab, University of Washington) |
| FPGA + Breadboard (Intermediate Level) |
|
RHLab (University of Washington), Matt Guo (RHLab, University of Washington) |