FPGA + Breadboard (Intermediate Level)
Simulate a parking lot car counter using digital circuits on a breadboard and FPGA
Ready-to-teach resources
Laboratory Exercises
3 results
Ready-to-teach resources
Laboratory Exercises
3 results
FPGA + Parking Lot (Intermediate Level)
Develop an intermediate-level parking lot management system using FPGA
FPGA + Wiper 2-Bit (Intermediate Level, SystemVerilog)
Design and test a stateful directional SystemVerilog controller for the Deusto Wiper 2-Bit simulation on a DE1-SoC.