FPGA + Wiper 2-Bit (Intermediate Level, SystemVerilog)

Design, implement, and test a stateful two-bit windshield-wiper controller using SystemVerilog and the Altera DE1-SoC. The activity covers the deployed endpoint-name compatibility contract, four command states, direction retention across dry pauses, immediate endpoint reversal, simultaneous-sensor fault output, and structured remote-lab testing.

• Student Activity Handout (PDF) — DE1-SoC Wiper 2-Bit with SystemVerilog
• Editable Student Activity Handout (DOCX) — DE1-SoC Wiper 2-Bit with SystemVerilog
• Instructor Solution (ZIP) — DE1-SoC Wiper 2-Bit with SystemVerilog Instructor approval is required. Contact the REDTAIL team about access. Already approved? Log in.