FPGA + Wiper (Basic Level, SystemVerilog)

Design, implement, and test a one-bit windshield-wiper controller using SystemVerilog and the Altera DE1-SoC. The activity covers the current REDTAIL GPIO mapping, rain-driven movement, simulation-owned endpoint reversal, conservative simultaneous-sensor handling, optional-button isolation, and structured remote-lab testing.

• Student Activity Handout (PDF) — DE1-SoC Wiper with SystemVerilog
• Editable Student Activity Handout (DOCX) — DE1-SoC Wiper with SystemVerilog
• Instructor Solution (ZIP) — DE1-SoC Wiper with SystemVerilog Instructor approval is required. Contact the REDTAIL team about access. Already approved? Log in.