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Laboratory Exercise: FPGA + Parking Lot (Basic Level)

By: RHLab (University of Washington) , Zhiyun Zhang (RHLab, University of Washington)
Description

Students will design a parking lot management system that allows cars to enter the parking lot if there are vacancies in it. They will need to design an FSM for the logic and use GPIO pins to interact with the 3D Parking Simulation.

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Learning Goals
    This lab provides a refresher of the Finite State Machine (FSM) and General Purpose Input/Output (GPIO) by designing a parking lot passcode entrance and occupancy counter.