Categories:

Supported Devices:

Altera DE1-SoC
- VHDL
- Verilog
- SystemVerilog
STM32 Nucleo WB55RG
- STM32CubeMX
- mbedOS
- Online IDE (STM32CubeMX)

LED Matrix

Simulation: LED Matrix

By: RHLab (University of Washington) , Colton Harris (RHLab, University of Washington)

I/O mapping for Altera DE1-SoC

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LED Matrix IO Mapping for DE1-SoC

Signal	Type	GPIO
Latch	FPGA output	GPIO 26
Pulse	FPGA output	GPIO 27
Green	FPGA output	GPIO 32
Red	FPGA output	GPIO 34